ASIC Prototyping Platform | Logic Emulation System

ASIC Prototyping Platform | Logic Emulation System

ASIC Prototyping Engine Features


Logic prototyping system with 2/3/4 Altera Stratix3/Stratix4 FPGA's

    - EP3SL200/340-4, -3, -2 (slowest to fastest)
    - EP4SE530/820-4, -3, -2 (slowest to fastest)
    - FF1517 package: 976 I/Os

PCI Express (4-lane)

    - PCIe GEN1 rev 1.1
    - PCI-X 64-bit 133MHz rev 1.1

30 Million+ ASIC gates (ASIC measure) when stuffed with 4 Stratix4 4SE530s


FPGA to FPGA interconnect is a mix of single-ended and LVDS

    - 600 MHz LVDS chip to chip (1.2 Gb/s)
    - LVDS pairs can be used as 2 single-ended signals at reduced frequency ~225MHz
    - 10x pin multiplexing per LVDS pair
    - Highly simplified logic partitioning
    - Source synchronous clocking for LVDS

Main Bus (MB) connects all FPGAs (60 signals)

    - Single-ended

2 separate DDR2 SODIMMs (250MHz)

    - Direct connection to FPGAs A, C
    - 64-bit data width, 250MHz operation
    - PC2-4200 or better
    - Addressing & power to support 4GB in each socket
    - DDR2 SODIMM data transfer rate: 32Gb/s
    - Alternate pin compatible memory cards (check for availability):
        - SRAM: QDR, ASYNC, STD, or PSRAM
        - FLASH
        - DRAM: SDR, DDR1, PSRAM or RLDRAM, DDR3
        - Mictor, Extra Interconnect

Independent low skew global clock networks

    - G0, EXT0
    - High resolution, user programmable synthesizers for G0
    - User configurable via SD/SDHC, USB
    - All global clock networks distributed differentially and balanced

Flexible customization via daughter cards using expansion connectors

    - 2 daughter card locations: FPGAs A, B
    - 200-pin FCI connectors
    - 450MHz on all signals with source synchronous LVDS
    - Reset
    - Pin multiplexing to/from daughter cards using LVDS (up to 10x)

Fast and Painless FPGA configuration

    - SD/SDHC, USB, JTAG
    - Configuration Error reporting

Cypress EZ-USB FX2LP USB Controller


Full support for embedded logic analyzers via JTAG interface

    - SignalTap and other third-party debug solutions

ASIC Prototyping Platform | Logic Emulation System

ASIC Prototyping Platform | Logic Emulation System

 
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